Setup and Hold Time

Setup and hold times define a window around the clock edge during which a flip-flop's data input must stay stable.

The two constraints

A flip-flop reliably captures its input only if the data is steady around the clock edge. Setup time is how long the input must be stable before the edge. Hold time is how long it must remain stable after the edge. Together they form a forbidden window in which the input must not change.

Setup and the clock period

The setup constraint bounds how fast the clock can run. The data launched from one flip-flop must travel through the combinational logic and arrive at the next flip-flop at least one setup time before the next edge. If the logic is too slow, the clock period must be lengthened, this is the max-delay or setup check.

Hold and short paths

The hold constraint is about paths that are too short. Newly launched data must not race through fast logic and reach the next flip-flop before its hold window closes, corrupting the value being captured. This min-delay or hold check does not depend on the clock period and cannot be fixed by slowing the clock.

What violations cause

Changing the input inside the forbidden window can drive the flip-flop into metastability, an undefined state that resolves after an unpredictable delay. Timing analysis exists to prove no path violates these windows.

Fixing violations

Setup failures are fixed by faster logic, fewer levels of gates, or a slower clock. Hold failures are fixed by adding delay, such as buffers, on the too-fast path.