CRC and Error Detection
A cyclic redundancy check appends bits computed by polynomial division so hardware can detect errors in transmitted or stored data.
Catching Corruption
Data sent over a link or stored on a medium can be corrupted: a bit flips, a burst of noise garbles a run of bits. A cyclic redundancy check (CRC) is a compact, hardware-friendly way to detect such errors. The sender computes a check value from the data and appends it; the receiver recomputes it and compares. A mismatch means the data was corrupted in transit.
Polynomial Division
A CRC treats the data as the coefficients of a polynomial over the field GF(2), where addition is XOR. The data polynomial is divided by a fixed generator polynomial, and the remainder is the CRC. In hardware this division is astonishingly cheap: a shift register with XOR taps positioned according to the generator polynomial computes the remainder one bit per clock, or many bits per clock with parallel logic.
- Data viewed as a GF(2) polynomial; arithmetic is XOR
- Divide by a chosen generator polynomial; the remainder is the CRC
- Implemented as a linear-feedback shift register with XOR taps
What CRCs Catch
The strength of a CRC depends on its generator polynomial. A well-chosen degree-n polynomial detects all single-bit errors, all double-bit errors within a range, any odd number of errors (if the polynomial has a factor that ensures it), and all burst errors up to n bits long. This makes CRCs excellent at catching the clustered errors that real hardware faults tend to produce.
Detection, Not Correction
A CRC detects errors but does not locate or correct them; recovery is by retransmission or by a separate error-correcting code. CRCs guard Ethernet frames, storage sectors, and countless communication protocols. In instrumentation and control systems, including the data links around large experimental apparatus, CRCs provide a cheap, reliable guarantee that a corrupted measurement or command is caught rather than acted upon silently.