Direct Memory Access
Direct memory access lets peripherals move data to and from memory without the processor copying every byte, freeing it for other work.
Offloading the Copy
Without help, a processor must read each byte from a device and write it to memory itself, a technique called programmed I/O that ties up the core during every transfer. Direct memory access (DMA) delegates the transfer to a dedicated DMA controller that moves data between a device and memory on its own, interrupting the processor only when the whole block is done.
How a Transfer Works
The processor programs the DMA controller with a source address, a destination address, a count, and a direction, then issues a start. The controller arbitrates for the memory bus and streams the data across. When the count reaches zero it raises an interrupt so the processor knows the transfer completed.
- Burst mode: seize the bus and move the whole block at once
- Cycle stealing: take one bus cycle at a time between processor accesses
- Scatter-gather: follow a list of descriptors for non-contiguous buffers
Bus Mastering and Coherence
A DMA controller acts as a bus master, competing with the processor for access to memory. Because it writes memory directly, it can leave the processor's caches holding stale data. Systems solve this either with hardware cache coherence that snoops DMA traffic, or by software that flushes and invalidates the affected cache lines around each transfer.
Where It Matters
High-rate data acquisition depends on DMA: a sensor or digitizer streaming samples cannot afford a processor in the byte-by-byte loop. In experimental physics instrumentation, detector electronics use DMA to push large sample streams into memory while the processor stays free for control and analysis. The same pattern serves disk controllers, network cards, and graphics hardware. Scatter-gather DMA, driven by descriptor lists, moves fragmented buffers efficiently and underlies modern high-speed I/O.