Hardware Multithreading
Hardware multithreading keeps a core busy by running several instruction streams, filling stalls from one thread with work from another.
Hiding Stalls with Threads
Even a wide, aggressive core often waits: a cache miss can idle it for hundreds of cycles, and a single instruction stream rarely has enough independent work to fill that gap. Hardware multithreading runs several threads on one core and switches among them, so when one thread stalls the core executes another. The hardware holds the state of multiple threads at once to make the switch nearly free.
Coarse, Fine, and Simultaneous
There are three main styles. Coarse-grained multithreading switches threads only on a costly stall like a cache miss. Fine-grained multithreading rotates threads every cycle, hiding short latencies well but slowing any single thread. Simultaneous multithreading (SMT) goes furthest: on a superscalar core it issues instructions from several threads in the very same cycle, filling the wide issue slots that one thread alone would leave empty.
- Coarse-grained: switch on long-latency events
- Fine-grained: switch every cycle in round-robin
- Simultaneous: multiple threads issue in the same cycle
What It Costs
Multithreading needs replicated per-thread state: multiple program counters and register sets, and thread tags throughout the pipeline. But it shares the expensive resources, the execution units, caches, and predictors, across threads. This makes it a cheap way to raise throughput and utilization compared with adding whole cores, which is why SMT (marketed as hyper-threading on some processors) is common.
Trade-offs
Multithreading raises total throughput but can lower single-thread performance, since threads contend for shared caches and units. It shines on throughput-oriented workloads with many independent tasks and abundant memory stalls, and helps less when one latency-sensitive thread wants the whole core. It sits alongside superscalar issue and multiple cores as one of the three ways modern processors extract parallelism.