L1 · Control Plane · Kronos Fusion Energy

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L1 · Control Plane

Edge FPGA microsecond-determinism, hard real-time actuation, and the autonomous hardware failsafe.

L1 · Control Plane — its place in the stack (left, click any layer) and its internal components (right). Telemetry rises; control descends.

What this layer does

Edge FPGA microsecond-determinism, hard real-time actuation, and the autonomous hardware failsafe. Every page in this section is part of the same control stack — click any card to go deeper, or return to the Master Blueprint to see how it connects.

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Actuator Command Arbitration Ambipolar Potential Control Beam Notching for Fast Protection Clock Distribution and Synchronization Coil Power-Supply Switching Control Control Safety Integrity Levels Control-Plane Isolation and Integrity DEC Collector-Grid Voltage Modulation DEC Fault Ride-Through DEC Grid Modulation Loop Determinism vs Learning Deterministic I/O Through Cryo-Rated Feedthroughs Deterministic Network Fabric Deterministic Vacuum Interlocks Diagnostics Constellation Timing Disruption Avoidance Actuation Disruption Mitigation Injection Divertor and Expander Control ELM-Free Regime Control Edge FPGA Microsecond-Deterministic Actuation End-Plug Density Control FPGA Fabric Selection FPGA vs CPU vs GPU for Control Fail-Safe vs Fail-Operational Fuel-Cycle Isotope Balancing Gas-Puffing Servo Valves Hard Real-Time Bounds Hardware-in-the-Loop Commissioning High-Bandwidth State-Vector Ingress ICE-PISTON Preload Control Interlock Logic Hardware L1 Control Plane Architecture Overview MPC to FPGA Command Handoff Magnet Delta-T Quench Precursor Multi-Modal DEC Train Control Neutral-Beam Injection Actuator PF Shaping Coils and Negative Triangularity PLC Deterministic Controls Pellet Injection Timing Plasma Current Feedback Plasma-Facing Thermal-Protection Loop Quench Detection Hardware REBCO Strain and Quench Sensing Radial Position Control Real-Time Compute Actuators Real-Time Equilibrium Reconstruction Real-Time Linux vs FPGA Shape Control: Negative Triangularity Structural Health Monitoring Loop Synchronized Actuation Gates The Autonomous Hardware Failsafe The L1 to L2/L3 Boundary The Sensor-to-Actuator Pipeline The Sub-10-Microsecond Command Boundary Timing Budgets and Jitter Triple-Modular Redundancy and Voting VOx Quench-Bypass Dump Vertical Stability Control Watchdog Timers and Heartbeats Worst-Case Execution Time (WCET)

L1 · Control Plane

What this layer does

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